Since the introduction of semiconductor devices, the size of semiconductor devices has been continuously shrinking, resulting in smaller semiconductor chip size and increased device density. One of the limiting factors in the continuing evolution toward smaller device size and higher density has been the stringent requirements placed on photolithographic processes as line width and step heights have decreased for device features. As one way to overcome such limitations, various methods have been implemented to increase the resolution performance of photoresists and to eliminate photoresist interfering effects occurring in the semiconductor wafer manufacturing process.
For example, several different photoresist interfering effects may occur to form unacceptable photoresist profiles. Typically a photoresist layer is applied to a semiconductor wafer surface, for example, by spin coating a resinous layer over the process surface followed by what is referred to as a ‘soft bake’ to impart structural stability to the photoresist layer. The photoresist layer is then aligned and exposed to activating light through a photomask after which the photoresist undergoes a post exposure baking (PEB) process to improve adhesion and to initiate catalyzed photoresist reactions in chemically amplified photoresists, for example, deep ultraviolet (DUV) photoresists. For example in DUV photoresists the PEB process a photoacid generated during the exposure process acts to remove a protecting group from the resin thereby rendering the exposed region of the photoresist soluble in a developer. DUV photoresists, typically positive photoresists, are used for critical dimensions (CD's) of less than about 0.25 microns.
The temperature and time period of the PEB process is critical to CD control of developed photoresist profiles. Temperatures must typically be controlled to within about 0.1° C. to prevent CD variations due to undesirable photoresist chemical reactions. Another factor affecting DUV photoresist profiles is the presence of amines on the semiconductor wafer surface that tend to interfere with the acid-catalyzed reaction following exposure of the photoresist. For example, amines may be present within semiconductor wafer materials from previous processes including, for example, the CVD deposition of metal nitrides to form, for example, etching stop or bottom anti-reflectance coating (BARC) layers. As a result, the exposed photoresist region does not become fully soluble thereby resulting in altered photoresist profiles affecting CD's.
Another problem affecting photoresist profiles is the presence of reflected light from wafer process surface to form standing waves along the exposure profile resulting in light intensity exposure variation along the sidewalls of the exposed photoresist region. In addition, the development process must be properly controlled to avoid additional factors adversely affecting photoresist profiles. For example, for positive photoresists a solution typically containing tetra-methyl ammonium hydroxide (TMAH) is used as the developer. The developer may be applied by a variety of methods including spin-spray methods where the process wafer is rotated at high speeds while the developer is sprayed onto the surface. A number of factors including developer solution normality, developer temperature, and the method of applying the developer can all affect photoresist profiles.
For example, referring to FIG. 1 is shown exemplary cross sectional views of defective photoresist profiles that may be caused by improper exposure and development. For example shown in FIG. 1 is shown a series of conceptual photoresist profiles formed over substrate 10. For example, photoresist profile portion 12 represents underdevelopment of a patterned photoresist profile. Photoresist profile portion 14 represents an incompletely developed patterned photoresist profile. Photoresist profile portion 16 represents an acceptably developed patterned photoresist profile while photoresist profile portion 18 represents an overdeveloped photoresist profile.
Following development, the photoresist is subjected to a hard bake to drive off remaining solvents and achieve maximum densification of the photoresist. Following the hard bake, the process wafer is subjected to metrology inspection to identify unacceptable photoresist profiles and other exposure and development defects. In addition, the photoresist pattern is closely inspected according to various metrology tools such as microscopy to characterize the photo-patterning process in an effort to identify shortcomings in the manufacturing process which require corrective action.
There are two major popular methodologies used for the metrology of photoresist patterns including photoresist profiles. One metrology method for inspecting photoresist patterns is referred to as in-line scanning electron microscopy (SEM) where the wafer can only be examined from a top planar view thus providing little information on cross sectional profile variations. A second metrology method is referred to as off-line SEM where a representative process wafer or cross sectional portion is positioned in cross sectional view to be examined by SEM. One problem with off-line SEM is that sample preparation procedures necessary for producing a satisfactory signal from insulating materials, such as photoresist, include coating the photoresist with a conductive material, altering photoresist profiles thereby complicating the determination of the profile dimensions and determinations of whether variations are caused by the SEM sample preparation procedures or photoresist exposure and development procedures. Another problem with off-line SEM photoresist inspection is that the resolution is limited to about 50 Angstroms. For example, referring to FIG. 2 is a conceptual representation of an off-line cross sectional view of a patterned photoresist layer including typical photoresist profiles e.g., 20A patterned over substrate 20B at a typical magnification where the base portion at e.g., 20C is about 140 nm in width. With increasingly smaller critical dimensions required in semiconductor device processing such resolution is frequently not adequate to gather dimensional CD information required to optimize manufacturing processes.
There is therefore a need in the semiconductor manufacturing art to develop an improved method for patterned photoresist sample preparation and metrology including photoresist profile characterization allowing CD information to be preserved while increasing a characterization resolution.
It is therefore an object of the invention to provide an improved method for patterned photoresist sample preparation and metrology including photoresist profile characterization allowing CD information to be preserved while increasing a characterization resolution while overcoming other shortcomings of the prior art.